ACFS : a completely fair scheduler for asymmetric single-ISA multicore systems
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Item type | Home library | Call number | Status | Date due | Barcode | |
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Biblioteca de la Facultad de Informática | A0669 (Browse shelf(Opens below)) | No corresponde |
Formato de archivo: PDF. -- Este documento es producción intelectual de la Facultad de Informática - UNLP (Colección BIPA/Biblioteca)
Single-ISA (instruction set architecture) asymmetric multi- core processors (AMPs) were shown to deliver higher per- formance per watt and area than symmetric CMPs (Chip Multi-Processors) for applications with diverse architectural requirements. A large body of work has demonstrated that this potential of AMP systems can be realizable via OS scheduling. Yet, existing schedulers that seek to deliver fairness on AMPs do not ensure that equal-priority applica- tions experience the same slowdown when sharing the sys- tem. Moreover, most of these schemes are also subject to high throughput degradation and fail to effectively deal with user priorities. In this work we propose ACFS, an asymmetry-aware com- pletely fair scheduler that seeks to optimize fairness while ensuring acceptable throughput. Our evaluation on real AMP hardware, and using scheduler implementations on a general-purpose OS, demonstrates that ACFS achieves an average 11% fairness improvement over state-of-the-art schemes, while providing better system throughput.
Symposium On Applied Computing (30st : 2015 abr. 13-17: Salamanca, España) Proceedings. Nueva York, ACM, 2015, pp. 2027-2032.